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The AMD K6 Processor
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After AMD's plans with the K5 turned into a debacle, AMD again claimed that they had the solution to make them more than just discount alternatives to Intel:
A chip with the power of a Pentium Pro, with MMX support and intended to fit into a standard socket 7.
AMD delivered its much anticipated K6 chip in April of 1997, beating Intel's Pentium II to the market by a month.
AMD showed their commitment to establishing themselves in the market when they purchased NexGen in 1996 and with it, the design for the
Nx686 processor. NexGen had been intending to market this chip in its own socket, but AMD changed the design to fit the
standard socket 7, added MMX support, and renamed it the K6. Despite the name implying a design evolving from the K5, it is in fact a totally different design
that was created by the NexGen team and adapted after the AMD purchase.
The K6 was originally launched running at speeds of 166 and 200 MHz in April 1997. It was followed by a 233 MHz version later in the summer of 1997. The release of
the 266 MHz version of this chip was not until spring 1998 when AMD were able to move to the 0.25 micron manufacturing process. The final iteration of the K6
design was released in May 1998 running at 300 MHz and continued with the K6-2.
Initially, the AMD K6 processors used Pentium II Rating (PR2) to designate their speed. The PR2 rating was dropped because the rated frequency of the processor was the same as the real frequency. This item was made in the month the K6 was released (week 17/1997 = April 21st - 27th, 1997) and has the initial PR2 marking.
References:
AMD K6 Tech Docs
Byte.com: AMD K6 Takes On Intel P6
PC Guide
Processor Emporum
Intel's Enemy No. 1: The AMD K6 CPU
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The AMD K6-2 Processor
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The K6-2 was a significant improvement over the K6. It built upon the K6's processing core, with the addition of 21 new instructions called "3D Now!". These are SIMD (Single Instruction Multiple Data) instructions designed to enhance the 3D geometry capability of the chip's floating point unit. This allowed the K6-2 to overcome the handicap of the slow (relative to Intel) CPU which the K6 owned.
The K6-2 also saw the introduction of a 100 MHz front side bus. This was only available to owners of new Super Socket 7 motherboards which also included features such as AGP. All of these features helped to give the K6-2 performance fast enough to be a credible challenger to the dominant
Pentium II. Performance of the two chips was broadly similar: the K6-2 tending to be faster for general-purpose
computing, the Intel part clearly superior at floating-point tasks. The K6-2 was a very successful chip and provided AMD with the marketing base and the
financial stability it would need to introduce the Athlon.
The K6-2 was originally manufactured in speeds of 266 & 300 MHz in May 1998. The 300 MHz chip saw the introduction of the 100 MHz bus over the conventional 66 MHz bus used by the 266 MHz chip. August 1998 a 333 MHz version on a 95 MHz bus has been released and was quickly followed by a 350 MHz version on the 100 MHz bus. November 1998 saw the release of the 366, 380 and 400 MHz versions of the chip. This has been followed by the release of a 450 MHz K6-2 in February 1999 and the 500 MHz version in August 1999.
References:
AMD K6-2 Tech Docs
Geek.com
Processor Emporum
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The AMD K6-2+ Processor
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The K6-2+ is a revised version of the K6-III. Essentially, the K6-2+ is a K6-III with a 128 KB L2 cache made on a new 180nm production process. It was also the first processors to be available with the PowerNow! power saving technology. Essentially, the power savings were achieved with a combination of frequency (through adjusting multipliers) and voltage reduction.
References:
AMD K6-2+ Data Sheet [pdf]
c't about first availability in Germany
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The AMD K6-III Processor
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The K6-III was the last and fastest of all Socket 7 processors. It achieved the distinction of being the fastest x86 processor on the market on release, and remained highly competitive for a considerable time afterwards.
In conception, the design was simple: it was a K6-2 with an additional L2 cache. The original K6-2 had a 64 KB primary cache and a much larger amount of motherboard-mounted cache (usually 512 KB or 1 MB but varying depending on the choice of main board). In contrast the competing Intel parts used 32 KB of L1 cache and either 128 KB of full-speed secondary cache integrated into the CPU itself (Celeron) or 512 KB of half-speed cache mounted on a processor daughter board (Pentium II, Pentium III). The K6-III, however, used both methods: it had 64 KB primary cache, a massive 256 KB on-chip, full-speed secondary cache (similar to the Celeron's but twice the size), and the variable size motherboard mounted cache on the Socket 7 main board became a tertiary level.
In execution, however, the design was not simple: with 21.4 million transistors, it was a very large chip to manufacture with early 1999 technology, and the K6 core design did not scale well past 500 MHz. Nevertheless, the K6-III 400 sold well, and the K6-III 450 was clearly the fastest x86 chip on the market on introduction, comfortably outperforming AMD's K6-2s and Intel's Pentium IIs.
References:
AMD K6-III Tech Docs |
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The AMD Athlon Processor
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The Athlon made its debut on August 21, 1999. The original Athlon core revision, codenamed "K7", was available in speeds of 500 to 650 MHz at its introduction and was later sold at speeds up to 1000 MHz.
Internally, the Athlon was essentially a major reworking of the K6 processor core designed for compatibility with the EV6 bus protocol (first used on DEC's Alpha 21264 RISC processor). AMD dramatically improved the floating-point unit from the K6 and put a large 128K level 1 cache on the chip. Like on the Intel Pentium II there was 512k of secondary cache, mounted on the CPU module and running at a lower speed than the core.
The resulting processor was the fastest x86 in the world. Various different versions of the Athlon held this distinction continuously from August 1999 until January 2002.
References: AMD Athlon Tech Docs |
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AMD Athlon K7500MTR51B C |
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K7500MTR51B C
219941006462 |
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| Core Frequency: | 500 MHz | | Board Frequency: | 100 MHz (x2) |
| Clock Multiplier: | 5.0 | | Data bus (ext.): | 64 Bit | | Address bus: | 32 Bit | | Transistors: | 22,000,000 | | Circuit Size: | 0.25 µ | | Core / I/O Voltage: | 1.6 / 3.3 V | | Introduced: | 08/1999 | | Manufactured: | week 41/1999 | | Made in: | USA | | L1 Cache: | 64+64 KB | | L2 Cache: | 512 KB | | CPU Code: | K7 Argon | | Package Type: | SECC-242 |
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Slot A |
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AMD Athlon K7550MTR51B C |
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K7550MTR51B C
219947198734 |
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| Core Frequency: | 550 MHz | | Board Frequency: | 100 MHz (x2) |
| Clock Multiplier: | 5.5 | | Data bus (ext.): | 64 Bit | | Address bus: | 32 Bit | | Transistors: | 22,000,000 | | Circuit Size: | 0.25 µ | | Core / I/O Voltage: | 1.6 / 3.3 V | | Introduced: | 08/1999 | | Manufactured: | week 47/1999 | | Made in: | USA | | L1 Cache: | 64+64 KB | | L2 Cache: | 512 KB | | CPU Code: | K7 Argon | | Package Type: | SECC-242 |
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Slot A |
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AMD Athlon K7650MTR51B C |
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K7650MTR51B C
219937137114 |
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| Core Frequency: | 650 MHz | | Board Frequency: | 100 MHz (x2) |
| Clock Multiplier: | 6.5 | | Data bus (ext.): | 64 Bit | | Address bus: | 32 Bit | | Transistors: | 22,000,000 | | Circuit Size: | 0.25 µ | | Core / I/O Voltage: | 1.6 / 3.3 V | | Introduced: | 08/1999 | | Manufactured: | week 37/1999 | | Made in: | USA | | L1 Cache: | 64+64 KB | | L2 Cache: | 512 KB | | CPU Code: | K7 Argon | | Package Type: | SECC-242 |
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Slot A |
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| L2-Cache runs with 50% (up to 700 MHZ), 40% (up to 850 MHz) or 33% (up to 1000 MHz) of CPU speed |
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AMD Athlon K7600MTR51B A |
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K7600CURBBA
91993260507
9951FPAW
(m)(c)1999 AMD |  |
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| Core Frequency: | 600 MHz | | Board Frequency: | 100 MHz (x2) |
| Clock Multiplier: | 6.0 | | Data bus (ext.): | 64 Bit | | Address bus: | 32 Bit | | Transistors: | 22,000,000 | | Circuit Size: | 0.18 µ | | Core / I/O Voltage: | 1.6 - 1.8 / 3.3 V | | Introduced: | 08/1999 | | Manufactured: | week 51/1999 | | Made in: | USA | | L1 Cache: | 64+64 KB | | L2 Cache: | 512 KB | | CPU Code: | K75 Pluto | | Package Type: | SECC-242 |
| Socket: |
Slot A |
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AMD Athlon K7700MTR51B A |
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K7700MTR51B A
210008524481 |
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| Core Frequency: | 700 MHz | | Board Frequency: | 100 MHz (x2) |
| Clock Multiplier: | 7.0 | | Data bus (ext.): | 64 Bit | | Address bus: | 32 Bit | | Transistors: | 22,000,000 | | Circuit Size: | 0.18 µ | | Core / I/O Voltage: | 1.6 - 1.8 / 3.3 V | | Introduced: | 08/1999 | | Manufactured: | week 08/2000 | | Made in: | USA | | L1 Cache: | 64+64 KB | | L2 Cache: | 512 KB | | CPU Code: | K75 Pluto | | Package Type: | SECC-242 |
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Slot A |
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AMD Athlon K7750MTR52B A |
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K7750MTR52B A
210027535592 |
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| Core Frequency: | 750 MHz | | Board Frequency: | 100 MHz (x2) |
| Clock Multiplier: | 7.5 | | Data bus (ext.): | 64 Bit | | Address bus: | 32 Bit | | Transistors: | 22,000,000 | | Circuit Size: | 0.18 µ | | Core / I/O Voltage: | 1.6 - 1.8 / 3.3 V | | Introduced: | 08/1999 | | Manufactured: | week 27/2000 | | Made in: | USA | | L1 Cache: | 64+64 KB | | L2 Cache: | 512 KB | | CPU Code: | K75 Pluto | | Package Type: | SECC-242 |
| Socket: |
Slot A |
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AMD Athlon K7800MPR52B A |
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K7800CPRBBA
91109620289
0006BPIW
(m)(c)1999 AMD |  |
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| Core Frequency: | 800 MHz | | Board Frequency: | 100 MHz (x2) |
| Clock Multiplier: | 8.0 | | Data bus (ext.): | 64 Bit | | Address bus: | 32 Bit | | Transistors: | 22,000,000 | | Circuit Size: | 0.18 µ | | Core / I/O Voltage: | 1.6 - 1.8 / 3.3 V | | Introduced: | 08/1999 | | Manufactured: | week 11/1999 | | Made in: | USA | | L1 Cache: | 64+64 KB | | L2 Cache: | 512 KB | | CPU Code: | K75 Pluto | | Package Type: | SECC-242 |
| Socket: |
Slot A |
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AMD Athlon K7850MPR52B A |
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K7850MPR52B A
230014040882 |
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| Core Frequency: | 850 MHz | | Board Frequency: | 100 MHz (x2) |
| Clock Multiplier: | 8.5 | | Data bus (ext.): | 64 Bit | | Address bus: | 32 Bit | | Transistors: | 22,000,000 | | Circuit Size: | 0.18 µ | | Core / I/O Voltage: | 1.6 - 1.8 / 3.3 V | | Introduced: | Feb. 11, 2000 | | Manufactured: | week 14/2000 | | Made in: | USA | | L1 Cache: | 64+64 KB | | L2 Cache: | 512 KB | | CPU Code: | K75 Pluto | | Package Type: | SECC-242 |
| Socket: |
Slot A |
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On June 4, 2000 AMD introduced an enhanced version of the Athlon processor, codenamed "Thunderbird". Fabricated using AMD's 0.18-micron process technology, the new core replaced the K75 chip's 512KB of off-die Level 2 cache by 256KB of cache integrated onto the die itself and running at the full clock speed of the processor. This is in contrast to the original Athlons that operated their L2 cache at a certain fraction of the core clock speed.
As well as boosting performance, moving the cache on-die also allowed AMD to follow Intel's lead in moving from slot-based processors in favour of a socket form factor - in AMD's case, a 462-pin format, named Socket A. Supporting PC133 memory, the enhanced Athlon processor was initially available in six speeds, from 750 MHz to 1 GHz, in both Slot A (albeit available to OEMs only) and the new Socket A packaging.
The last Athlon processors based on the Thunderbird core were released in the summer of 2001, by which time speeds had reached 1.4 GHz. Hereafter, the Athlon was to be replaced by the Athlon XP family based on the new Palomino core. |
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AMD Athlon A0700MPR24B A |
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AMD-A0700MPR24B A
710028056511 |
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| Core Frequency: | 700 MHz | | Board Frequency: | 100 MHz (x2) |
| Clock Multiplier: | 7.0 | | Data bus (ext.): | 64 Bit | | Address bus: | 32 Bit | | Transistors: | 37,000,000 | | Circuit Size: | 0.18 µ | | Core / I/O Voltage: | 1.6 - 1.8 / 3.3 V | | Manufactured: | week 28/2000 | | Made in: | USA | | L1 Cache: | 64+64 KB | | L2 Cache: | 256 KB | | CPU Code: | Athlon Thunderbird | | Package Type: | SECC-242 |
| Socket: |
Slot A |
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AMD released the Athlon XP ("eXtra Performance") on May 14, 2001, codenamed "Palomino". This Athlon version, the first to include the SSE instruction set from the Intel Pentium III as well as AMD's 3DNow! Professional, was introduced at speeds between 1333 and 1733 MHz. The major changes were optimizations to the core design to increase efficiency by roughly 10% over a Thunderbird at the same clock-speed, and power consumption reductions to allow it to be clocked faster.
The "Palomino" was first released as a mobile version, called the Mobile Athlon 4 (also codenamed "Corvette"), after the fact that it was AMD's fourth core to be called Athlon (after the original K7, the 0.18 µ K75, and the Thunderbird), but many people noted that the name was most likely a jab at the then-brand-new Intel Pentium 4. The desktop Athlon XP followed a few months later, in October.
The Athlon XP was marketed using a PR rating system, which compared its performance to a Thunderbird. Because the XP has much higher IPC (instructions per clock) than the Pentium 4 (and about 10% higher than a Thunderbird), it is more efficient and delivers the same level of performance at a lower clock-speed, or higher performance at the same speed. |
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The AMD Duron Processor
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The AMD Duron was released in the summer of 2000 as a low-cost alternative to the Athlon processor and the Pentium III and Celeron processor lines from Intel.
The Duron is pin-compatible with the Athlon and operating on the same motherboards. It has the same 128K of level 1 cache as the Athlon, but only 64K of level 2 cache, as compared to 256K on the more expensive chip. Because of this, the Duron generally lags behind the Athlon on business applications, but keeps up in floating-point operations thanks to its powerful FPU, which is identical to the Athlon's. The original Duron was limited to operating on a 100 MHz front-side bus speed, while the Athlon at the time could run on a bus clock of 133 MHz. Later Athlons supported a 200MHz bus.
References: AMD Duron Tech Docs
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