The MB86900 (also known as SF9010) was the very first SPARC processor. It was implemented on a pair of 20,000-gate Fujitsu gate-array chips and was used to power the Sun 4/260 'Sunrise' server and the 4/110 'Cobra', the first SPARC desktop computer (1987).
 
The first two implementations of the SPARC architecture, Fujitsu MB86900 and Cypress/ROSS CY7C601, were designed using high-speed CMOS technology with processor clock speed in the range of 16.6 to 33 MHz. In a system with a reasonable size external cache, these processors execute integer operations at a rate of approximately 1.5 clock cycles per instruction, resulting in a sustained performance in the range of 10 to 20 MIPS. The MB86900 design uses a single 20,000-gate 1.3 µ CMOS gate array and operates at a cycle time of 60 ns. The CY7C601 is a full custom chip designed using a 0.8 µ CMOS process and operates at a cycle time of 30 ns.