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NEC VR3000
  NEC D30310R-33 VR3000A-33
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The NEC VR3000 / MIPS R3000 Processor
The first commercial MIPS CPU model, the R2000, was announced in 1985 as a 32-bit implementation. It was followed by the R3000, the first successful MIPS design in the marketplace with more than 1 million processors made. The R3000 was used in high-end UNIX computers by Siemens and DEC and in the Silicon Graphics SGI Personal IRIS 4D/20 graphic workstations. On this machines 3D sequences for movies like The Abyss, Jurrasic Park or Terminator 2 were rendered.
The R3000 has an interface to handle 3 coprocessors. Each coprocessor has a flag line connected with the CPU that can be tested and a conditional branch executed dependent on its value. Coprocessor instructions can be executed directly from the instruction stream.
Coprocessor 0 (CP0) is incorporated on the CPU chip and supports the virtual memory system and exception handling. It is also referred to as the System Control Coprocessor. CP1 is reserved for the floating point coprocessor. An FPU is mandatory for most R3000 systems. CP2 is available for specific implementations and is often used to accelerate memory access by connecting it to an R3020 memory buffer or an R3220 read/write buffer chip. Later versions of the R3000 (R3000A) had built in memory buffer circuitry.
Reference:  R3000 at SGIstuff  R3000 information (German)
NEC D30310R-33 VR3000A-33
NEC D30310R-33 VR3000A-33 Top Side
9210E9 CPU
NEC D30310R-33 VR3000A-33 Back Side
A MIPS R3000 CPU, manufactured by MIPS licensee NEC.
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Core Frequency:33 MHz
Board Frequency:33 MHz
Data bus (ext.):32 Bit
Address bus:32 Bit
Circuit Size:1.20
Manufactured:week 10/1992
Made in:Japan
Package Type:Ceramic
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