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DEC StrongARM SA-110S
DEC StrongARM SA-110S Top Side
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StrongARM
SA-110S
(c) DEC 1995 DC1035
JD2215 A9743
ARM 233
DEC StrongARM SA-110S Back Side
A 32-bit RISC microprocessor featuring superior power efficiency, low cost, and high performance. The SA-110 is an implementation of Advanced RISC Machines Ltd. (ARM) Version 4 architecture. It is intended for embedded applications like handheld computers (PDAs), high-bandwidth network switching, storage systems and remote access devices. It was used as a CPU in Apple's Newton MessagePad 2000 series (162 MHz version) and Psion organizers and controlled several RAID controllers by Adaptec or Mylex. For more information please refer to the DEC technical reference (pdf).
 
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Core Frequency:233 MHz
Data bus (ext.):32 Bit
Address bus:32 Bit
Transistors:2,100,000
Circuit Size:0.35 µ
Introduced:1995
Manufactured:week 43/1997
L1 Cache:16+16 KB
Package Type:Plastic
TQFP-144
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