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Sun Microsystems SuperSPARC II
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The Sun Microsystems SuperSPARC II Processor
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| The SuperSPARC II, introduced in 1994, is an enhanced version of the SuperSPARC CPU. It maintains the foundation of the SuperSPARC architecture and incorporates a number of improvements. A second-level external cache controller, optional with the original SuperSPARC, is required with the SuperSPARC II design. The SuperSPARC II additionally supports dual-byte ordering as specified in the SPARC V9 architecture (thus being still 32-bit SPARC V8 compliant). Improvements include a streamlined integer pipeline, a redesigned FPU to offer better superscalar performance and a memory management unit with a TLB (translation lookaside buffer) for each of the on-chip caches. |
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